ChipForge’s NPU Challenge for Open Edge AI Chip Design Goes Live

ChipForge (SN108) has launched its NPU Challenge, opening a competition for engineers to design an AI accelerator chip and the software kernels needed to run real AI workloads on it.

The challenge went live on October 6, 2026, and is part of ChipForge’s work using open competition to improve chip designs and eventually move the strongest ones toward real silicon.

The focus of the challenge is edge AI, where intelligence runs directly on devices such as phones, cameras, sensors and wearables instead of relying entirely on data centers. These devices often use neural processing units, or NPUs, which are chips designed specifically to run AI workloads efficiently with limited power and space.

Participants in the ChipForge challenge must build an NPU capable of running four AI models from MLPerf Tiny, an industry benchmark suite for edge AI hardware. The workloads cover areas including voice, vision and sensor data, giving the competition a practical test of how well each design can handle real edge AI tasks.

Before speed or efficiency even counts, every submission must first be completely correct. Outputs are checked bit-for-bit against the official reference, and any design that fails this functional test receives no score. Designs that pass are then measured for performance and chip area using tools including Verilator, Yosys, and OpenLane.

The competition rewards miners who can produce the fastest and most area-efficient design without sacrificing correctness. Validators use the same open evaluator, making scores independently reproducible. Once a winning design is established, the target becomes harder, as the next winner must improve on the existing score by more than 10%.

This creates a continuous optimization process where each successful submission becomes the new standard for others to beat. Instead of chip development happening entirely behind closed doors, engineers anywhere can download the challenge package, test designs locally and submit improvements to the network.

ChipForge ultimately wants the process to extend beyond simulations. Its roadmap includes moving winning designs toward tape-out through open silicon shuttles and eventually into physical chips. The project has previously produced an open-source RISC-V microcontroller with hardware cryptography acceleration and has also identified bugs in Google’s Coral NPU that were later fixed upstream.

The current challenge, “NPU with Kernels optimized for 4 AI models,” runs for 336 hours (14 days). Each hotkey can submit up to five ZIP files of no more than 50 MB, while validators evaluate designs in batches before publishing the results. The winning miner receives rewards for 24 hours or until another design produces a better score.

The public leaderboard tracks the current score to beat alongside submission history and results, while the challenge package includes the rules and local evaluator needed to test designs before submitting them.

For hardware designers, AI engineers and Bittensor miners, ChipForge is turning edge AI chip development into an open competition where every new winner has to build something measurably better than what came before.

➛ Join ChipForge (SN108)’s NPU Challenge Here.